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Customer Testimonial
"One key aspect of the PC clock business is retaining cost competitiveness to non-programmable solutions, and Sidense has the unique advantage of being the smallest OTP in a standard CMOS process. Therefore it is by definition the lowest cost electrically programmable NV memory available."
Greg Richmond, VP Engineering and CTO SpectraLinear Inc.
Sidense's 1T-Fuse, Logic NVM IP is based on a patented, one-time programmable (OTP) technology that provides the most cost-effective and reliable OTP solution in the industry. No additional mask layers or process steps are required and the IP is portable across many different technology nodes and foundries. The OTP can be programmed in the field, at wafer probe, or during production testing. Sidense memory products are targeted to standard-logic digital CMOS processes that are 180nm to 40nm and smaller and are available for all Top-Tier foundries and selected IDMs.
Features
Uses logic CMOS digital process targeted to 180nm and below
Supported foundries include: TSMC, UMC, Fujitsu, SMIC, Tower, IBM and GLOBALFOUNDRIES
Field programmable
One-time programmable (OTP) and emulated multi-time programmable (eMTP)
Very small footprint using one transistor per bit
No additional masks or process steps required
Silicon proven
No additional programming voltages
Very fast read access times
More than 20-year retention
Conversion to mask ROM with a single diffusion mask
JTAG and BIST support
Extremely secure and almost impossible to reverse engineer
Sidense IP Docs
